16 Nov 2021
硬件小组资料整理
- 公共基础知识
- Input format for model checking Chisel
- Book: Chisel-Book
- Slides: Chisel Book Chapter1-7, Chisel Book Chapter8-10, Chisel_Book Chapter12
- Test code: Chap2
- FIRRTL (A Hardware Intermediate Representation and Compiler Framework)
- Github: firrtl
- Slides: BTRO2_Input format for model checking
- Paper: Unlocking Design Reuse with Hardware Compiler Frameworks
- Slides: HCF_chap3-4
- Input format for model checking Chisel
- 时序性质形式化验证
- Verilog/SystemVerilog Assertion
- 已有的部分SVA拓展到Chisel的工作
- 指令集一致性验证
- CPU/RISC-V指令集介绍
- 指令集规范